Boost control granularity on AMD EPYC platforms with Zen 4 and earlier processors

SUSE Linux Enterprise Server 16
SUSE Linux Enterprise Server 15 SP7
SUSE Linux Enterprise Server 15 SP6
SUSE Linux Enterprise Server 15 SP5

SUSE Linux Enterprise Server since version 15 SP5 allows the user to disable Core Performance Boost ("boost" for short) on each logical core individually. However, on AMD EPYC platforms with fourth generation and earlier Zen processors, having a mix of cores with boost enabled and disabled within a Core Complex Die (CCD) may result in those cores with boost disabled not reaching nominal frequency. Experimentation shows such cores reaching a maximum frequency that is up to 8% lower of their expected nominal value.

For example, consider an AMD EPYC fourth generation Zen processor, with nominal frequency of 2.15 GHz (also known as "base clock"), and max boost of 3.5 GHz. On such processor, let's say one CCD is composed by 8 physical cores (16 logical cores), namely CPUs 8..15 and 104..111.

The user may disable boost on cores 10 and 106 only, using the following commands:

echo 0 > /sys/devices/system/cpu/cpu10/cpufreq/boost
echo 0 > /sys/devices/system/cpu/cpu106/cpufreq/boost

Now these two cores may reach a maximum frequency that is slightly lower than the expected nominal frequency of 2.15 GHz, such as 2.0 GHz. This situation does not present itself with AMD EPYC processors from the fifth generation onward.

In order to selectively disable boost on an AMD EPYC processor from generations prior to the fifth one, all cores within a Core Complex Die (CCD) should share the same boost setting (i.e. disabled) for best results. That is to say, the granularity for optimal boost control on such platforms is that of the CCD.

In addition, all cores within a CCD should also share the same settings in the files /sys/devices/system/cpu/cpuX/cpufreq/scaling_max_freq and /sys/devices/system/cpu/cpuX/cpufreq/scaling_min_freq, where X is the core ID.

As per AMD, on AMD EPYC processors from generations prior to the fifth one, for best results the following three sysfs files should be set to the same value for all cores in a CCD:

/sys/devices/system/cpu/cpuX/cpufreq/boost
/sys/devices/system/cpu/cpuX/cpufreq/scaling_max_freq
/sys/devices/system/cpu/cpuX/cpufreq/scaling_min_freq

On CCDs where cores have mixed settings, the observed behavior is undefined.

To determine if the processor is an AMD EPYC 9004 (Zen4/family 25) series or older, issue the following command:

$ lscpu | egrep "Vendor|family"

For an AMD EPYC 9004 the output is :
Vendor ID:           AuthenticAMD
CPU family:          25

Earlier series would have a lower CPU family number. 

Given a core ID, in order to determine which other cores are part of the same Core Complex Die (CCD), one has to find out which cores share the same L3 cache. That is, if X is the ID of a core, then the following command will show all core IDs constituting the CCD cpuX belongs to:

# cat /sys/devices/system/cpu/cpuX/cache/index3/shared_cpu_list